Analog IC Design

Ring VCO Design + Layout in Cadence Virtuoso

Schematic Design: Created transistor-level schematic in Cadence Virtuoso
Simulation: Performed transient, AC, and noise analysis
Layout: Completed full custom layout with DRC/LVS verification
Post-Layout Simulation: Extracted parasitics and verified performance

Synopsis

Designed a current-starved ring-oscillator VCO in Cadence Virtuoso (Sky130 PDK), enabling voltage-controlled frequency tuning with fewer stages than a standard inverter chain. Verified performance across ff/tt/ss corners and 0-70 °C, and added an inverter buffer to drive a 1 pF load while staying within the power spec.