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Ring VCO layout

Analog IC Design

Ring VCO Design + Layout in Cadence Virtuoso

Designed a current-starved ring-oscillator VCO in Cadence Virtuoso (Sky130 PDK). Verified across ff/tt/ss corners and temperature sweep of 0–70°C; added an inverter buffer to drive 1 pF load within power spec.

Skills

Analog IC design Custom layout DRC / LVS Corner & temp analysis Buffer design